1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly to an arrays substrate being capable of preventing an electrical shortage problem and a method of fabricating the array substrate.
2. Discussion of the Related Art
Recently, the LCD devices having characteristics of light weight, thinness and low power consumption are introduced. Among these LCD devices, the LCD device including a thin film transistor (TFT) as a switching element, referred to as an active matrix LCD (AM-LCD) device, has excellent characteristics of high resolution and displaying moving images such that the AM-LCD device are widely used.
Generally, the LCD devices are fabricated by an array substrate process, a color filter substrate process and a cell process. In the array substrate process, a TFT and a pixel electrode are formed on a first substrate such that an array substrate is obtained. In the color filter substrate process, a color filter and a common electrode are formed on a second substrate such that a color filter substrate is obtained. Then, in the cell process, a liquid crystal layer is interposed between the first and second substrates.
FIG. 1 is an exploded perspective view of the related art LCD device. In FIG. 1, The LCD device includes first and second substrates 12 and 22, and a liquid crystal layer 30. The first and second substrates 12 and 22 face each other, and the liquid crystal layer 30 is interposed therebetween.
The first substrate 12 includes a gate line 14, a data line 16, a TFT “Tr”, and a pixel electrode 18. The first substrate 12 including these elements is referred to as an array substrate 10. The gate line 14 and the data line 16 cross each other such that a region is formed between the gate and data lines 14 and 16 and is defined as a pixel region “P”. The TFT “Tr” is formed at a crossing portion of the gate and data lines 14 and 16, and the pixel electrode 18 is formed in the pixel region “P” and connected to the TFT “Tr”.
The second substrate 22 includes a black matrix 25, a color filter layer 26, and a common electrode 28. The second substrate 22 including these elements is referred to as a color filter substrate 20. The black matrix 25 has a lattice shape to cover a non-display region of the first substrate 12, such as the gate line 14 and the data line 16 on the first substrate 12. A light leakage in the non-display region is blocked by the black matrix 25. The color filter layer 26 includes first, second, and third sub-color filters 26a, 26b, and 26c. Each of the sub-color filters 26a, 26b, and 26c has one of red, green, and blue colors R, G, and B and corresponds to the each pixel region “P”. The common electrode 28 is formed on the black matrix 25 and the color filter layers 26 and over an entire surface of the second substrate 22.
Although not shown, edges of the first and second substrates 12 and 22 are sealed such that a leakage of the liquid crystal layer 30 is prevented. First and second alignment layers for controlling an initial arrangement of the liquid crystal molecules in the liquid crystal layer 30 are formed on the first and second substrates 12 and 22, respectively. A polarizing plate is formed on at least one outer side of the first and second substrates 12 and 22. In addition, a backlight unit for providing light is disposed under the first substrate 12.
When the TFT “Tr” is turned on by a signal through the gate line 14, a signal is applied to the pixel electrode 18 through the data line 16 such that a vertical electric field is induced between the pixel and common electrode 18 and 28. As a result, the liquid crystal layer 30 is driven by a vertical electric such that the LCD device can produce images.
FIG. 2 is a plane view showing one pixel region of an array substrate for the related art LCD device. In FIG. 2, a gate line 55 and a data line 80 are disposed on a substrate 51. The gate and data lines 55 and 80 cross each other to define a pixel region “P”. A TFT “Tr”, which is connected to the gate and data lines 55 and 80, as a switching element is disposed in the pixel region “P”. In addition, a common line 59, which is formed of the same material and disposed on the same layer as the gate line 58, is disposed on the substrate 51. The common line 59 is parallel to and spaced apart from the gate line 58.
The TFT “Tr” includes a gate electrode 57, a semiconductor layer 78, a source electrode 83 and a drain electrode 86. A pixel electrode 93 is connected to the drain electrode 86 through a drain contact hole 90. The pixel electrode 93 overlaps the common line 59 to form a storage capacitor “StgC”.
As mentioned above, the common line 59 is disposed on the same layer as the gate line 58. Namely, the gate line 58 and the common line 59 are formed by patterning a metal layer (not shown) on the substrate 51. When there is a defect, for example, particles, on a patterning process, there is an electrical short problem between the gate line 58 and the common line 59. The electrical short problem is not remedied by following processes, for example, a process of forming the semiconductor layer 78, a process of forming the source and drain electrodes 83 and 86 and a process of forming the pixel electrode 93.
To remedy the electrical short problem, a repair process for cutting the electrical short portion by irradiating a leaser beam is required. Or, an additional mask process, which includes a step of forming a photoresist (PR) layer, a step of exposing the PR layer, a step of developing the exposed PR layer, and a step of etching the metal layer, for removing the electrical short portion, is required. As a result, the production costs are increased and the production yield is decreased because of the electrical short problem. The electrical short problem may be generated not only the gate and common lines 58 and 59 but also other electric lines.